{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,11,27]],"date-time":"2024-11-27T14:40:20Z","timestamp":1732718420325,"version":"3.28.2"},"reference-count":37,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"11","license":[{"start":{"date-parts":[[2024,11,1]],"date-time":"2024-11-01T00:00:00Z","timestamp":1730419200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2024,11,1]],"date-time":"2024-11-01T00:00:00Z","timestamp":1730419200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,11,1]],"date-time":"2024-11-01T00:00:00Z","timestamp":1730419200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES) 2024 and appeared as part of the ESWEEK-TCAD Special Issue"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."],"published-print":{"date-parts":[[2024,11]]},"DOI":"10.1109\/tcad.2024.3443707","type":"journal-article","created":{"date-parts":[[2024,11,6]],"date-time":"2024-11-06T18:40:50Z","timestamp":1730918450000},"page":"4142-4153","source":"Crossref","is-referenced-by-count":0,"title":["GPU Performance Optimization via Intergroup Cache Cooperation"],"prefix":"10.1109","volume":"43","author":[{"ORCID":"http:\/\/orcid.org\/0009-0005-5062-641X","authenticated-orcid":false,"given":"Guosheng","family":"Wang","sequence":"first","affiliation":[{"name":"School of Computer Science and Technology, Wuhan University of Technology, Wuhan, China"}]},{"ORCID":"http:\/\/orcid.org\/0000-0002-8937-8055","authenticated-orcid":false,"given":"Yajuan","family":"Du","sequence":"additional","affiliation":[{"name":"School of Computer Science and Technology, Wuhan University of Technology, Wuhan, China"}]},{"ORCID":"http:\/\/orcid.org\/0009-0006-5022-7248","authenticated-orcid":false,"given":"Weiming","family":"Huang","sequence":"additional","affiliation":[{"name":"School of Computer Science and Technology, Wuhan University of Technology, Wuhan, China"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/3178487.3178491"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/HiPC.2019.00034"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA45697.2020.00080"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/3489517.3530584"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2022.3177955"},{"volume-title":"NVIDIA\u2019s next generation CUDA compute architecture: Fermi","year":"2009","key":"ref6"},{"volume-title":"NVIDIA tesla P100","year":"2016","key":"ref7"},{"volume-title":"NVIDIA Telsa V100 GPU architecture","year":"2017","key":"ref8"},{"volume-title":"NVIDIA turing GPU architecture","year":"2018","key":"ref9"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/216585.216588"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2011.15"},{"key":"ref12","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-031-01725-4","volume-title":"On-Chip Networks","author":"Jerger","year":"2009"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISVDAT.2015.7208160"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA53966.2022.00054"},{"volume-title":"Memory latency: To tolerate or to reduce?","year":"2000","author":"Bakshi","key":"ref15"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2014.11"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/3225058.3225104"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/3322127"},{"key":"ref19","first-page":"183","article-title":"Linebacker: Preserving victim cache lines in idle register files of GPUs","volume-title":"Proc. ACM\/IEEE 46th Annu. Int. Symp. Comput. Archit. (ISCA)","author":"Oh"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/2716282.2716283"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080239"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2015.7056046"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/3001589"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2019.00028"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/3410463.3414623"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA51647.2021.00047"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2023.3337192"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2009.4919648"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2009.5306797"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/InPar.2012.6339595"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/1454115.1454152"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2019.00021"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/1735688.1735702"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1145\/3466752.3480063"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/3566097.3567838"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1145\/3287624.3287633"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/ISPDC.2014.29"}],"container-title":["IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/43\/10745760\/10745842.pdf?arnumber=10745842","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,11,27]],"date-time":"2024-11-27T14:22:05Z","timestamp":1732717325000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10745842\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,11]]},"references-count":37,"journal-issue":{"issue":"11"},"URL":"https:\/\/doi.org\/10.1109\/tcad.2024.3443707","relation":{},"ISSN":["0278-0070","1937-4151"],"issn-type":[{"type":"print","value":"0278-0070"},{"type":"electronic","value":"1937-4151"}],"subject":[],"published":{"date-parts":[[2024,11]]}}}