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Digital Design and Computer Architecture: ARM Edition covers the fundamentals of digital logic design and reinforces logic concepts through the design of an ARM microprocessor. Combining an engaging and humorous writing style with an updated and hands-on approach to digital design, this book takes the reader from the fundamentals of digital logic to the actual design of an ARM processor. By the end of this book, readers will be able to build their own microprocessor and will have a top-to-bottom understanding of how it works. Beginning with digital logic gates and progressing to the design of combinational and sequential circuits, this book uses these fundamental building blocks as the basis for designing an ARM processor. SystemVerilog and VHDL are integrated throughout the text in examples illustrating the methods and techniques for CAD-based circuit design. The companion website includes a chapter on I/O systems with practical examples that show how to use the Raspberry Pi computer to communicate with peripheral devices such as LCDs, Bluetooth radios, and motors. This book will be a valuable resource for students taking a course that combines digital logic and computer architecture or students taking a two-quarter sequence in digital logic and computer organization/architecture. No library descriptions found. |
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Google Books — Loading... GenresMelvil Decimal System (DDC)621.381Technology Engineering Applied physics Electrical, magnetic, optical, communications, computer engineering; electronics, lighting Electronics, communications engineering ElectronicsLC ClassificationRatingAverage:
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The book is carefully written and good to understand. It has an appealing layout, by which I mainly mean that meaningful figures are provided where they make sense educationally. It contains many exercises which are appropriate for the material covered.
On the downside, I find the description of "Memory" not as throughout as I had hoped. For example, a throughout schematic of DRAM is never provided and only cursory explanations are given. Until chapter 8 it is assumed that memory can be accessed in one clock cycle, and it is not worked out how a CPU implements logic to wait for memory.
In chapter 8, section 8.1 then tackles "Caches", but unfortunately not in the context of the overall CPU microarchitecture. The same holds for Section 8.2 which deals with virtual memory; here I miss a connection to the OS. Section 8.3 examines IO-devices in a very superficial and fast-paced way, from which I could not learn much. All in all, I found chapter 8 the weakest. ( )